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A screenshot of the study in the Science Advances journal. / Science
A screenshot of the study in the Science Advances journal. / Science
A team of Chinese researchers has developed the world's smallest ferroelectric transistor with ultralow power consumption, offering new insights into progress in the semiconductor industry, according to a study published recently in the journal Science Advances.
In advanced semiconductor manufacturing processes, the operating voltage of logic chips has been reduced to 0.7 volts to achieve high energy efficiency. However, mainstream non-volatile memory, such as NAND flash, previously required 5 volts or more to complete write operations.
This mismatch led to the integration of complex circuits for voltage step-up or step-down, enabling collaboration between logic and memory units. Such integration resulted in additional power consumption, wasted space, and data transfer bottlenecks between logic and memory.
In typical AI chips, 60 to 90 percent of total power consumption is used for data transfer rather than computation. This has become a core constraint limiting improvements in AI computing power and energy efficiency.
The team from Peking University, led by Qiu Chenguang, a senior researcher, and Peng Lianmao, an academician of the Chinese Academy of Sciences, has developed nano-gate ferroelectric transistors operating at an ultralow voltage of 0.6 volts, successfully shrinking the physical gate size to 1 nanometer.
Reviewers of Science Advances note that these nano-gate ferroelectric transistor devices exhibit excellent memory performance and, for the first time, achieve voltage compatibility between ferroelectric memory devices and logic transistors. The underlying physical mechanism has significant implications for the development of the memory sector.
Qiu said their findings resolve the challenge of voltage incompatibility between memory and logic. Data can now be transferred between memory and computing units at the same low voltage, with zero barriers and ultra-low power consumption, enabling high-speed interaction.
He added that the principle behind this technology is universal and applicable to mainstream ferroelectric materials. It can also be mass-produced using standard industrial processes, demonstrating strong industrial compatibility.
Notably, this technology is expected to be used for large-model inference, edge intelligence, wearable devices, and Internet of Things terminals in the future.
A screenshot of the study in the Science Advances journal. / Science
A team of Chinese researchers has developed the world's smallest ferroelectric transistor with ultralow power consumption, offering new insights into progress in the semiconductor industry, according to a study published recently in the journal Science Advances.
In advanced semiconductor manufacturing processes, the operating voltage of logic chips has been reduced to 0.7 volts to achieve high energy efficiency. However, mainstream non-volatile memory, such as NAND flash, previously required 5 volts or more to complete write operations.
This mismatch led to the integration of complex circuits for voltage step-up or step-down, enabling collaboration between logic and memory units. Such integration resulted in additional power consumption, wasted space, and data transfer bottlenecks between logic and memory.
In typical AI chips, 60 to 90 percent of total power consumption is used for data transfer rather than computation. This has become a core constraint limiting improvements in AI computing power and energy efficiency.
The team from Peking University, led by Qiu Chenguang, a senior researcher, and Peng Lianmao, an academician of the Chinese Academy of Sciences, has developed nano-gate ferroelectric transistors operating at an ultralow voltage of 0.6 volts, successfully shrinking the physical gate size to 1 nanometer.
Reviewers of Science Advances note that these nano-gate ferroelectric transistor devices exhibit excellent memory performance and, for the first time, achieve voltage compatibility between ferroelectric memory devices and logic transistors. The underlying physical mechanism has significant implications for the development of the memory sector.
Qiu said their findings resolve the challenge of voltage incompatibility between memory and logic. Data can now be transferred between memory and computing units at the same low voltage, with zero barriers and ultra-low power consumption, enabling high-speed interaction.
He added that the principle behind this technology is universal and applicable to mainstream ferroelectric materials. It can also be mass-produced using standard industrial processes, demonstrating strong industrial compatibility.
Notably, this technology is expected to be used for large-model inference, edge intelligence, wearable devices, and Internet of Things terminals in the future.